Timing lock detection apparatus and method for digital...

Pulse or digital communications – Testing – Phase error or phase jitter

Reexamination Certificate

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Details

C375S316000, C375S285000, C375S354000, C375S357000, C375S371000, C702S069000, C702S071000, C702S072000, C702S079000

Reexamination Certificate

active

07933322

ABSTRACT:
A timing lock detection apparatus and method for digital broadcasting receiver are provided. The apparatus includes: a discrete value generator for cyclically selecting a discrete signal value from a continuous timing error signal; a differential calculator for obtaining a difference between the currently selected timing error signal value and a previously selected timing error signal that is a timing jitter signal; a sign variation detector for detecting variation in a sign of the timing jitter signal; a lock control signal generator for discriminating a period based on the detected sign changing time, and controlling a lock step of the loop filter according to a convergence mode of the timing jitter signal at each period; and a lock detection signal generator for generating a lock signal or an unlock signal according to whether the timing jitter signal reaches a steady state and using the current lock step signal.

REFERENCES:
patent: 6696886 (2004-02-01), Ke et al.
patent: 6757024 (2004-06-01), Lee
patent: 7440528 (2008-10-01), Lee
patent: 2004/0202271 (2004-10-01), Fahim
patent: 10-2000-0020597 (2000-04-01), None
patent: 10-2001-0068618 (2001-07-01), None
patent: 10-2005-0033306 (2005-04-01), None
patent: 10-2005-0052785 (2005-06-01), None

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