Timing generator of flat panel display and polarity...

Computer graphics processing and selective visual display system – Display driving control circuitry – Waveform generator coupled to display elements

Reexamination Certificate

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Details

C345S087000, C345S096000, C345S099000

Reexamination Certificate

active

10799675

ABSTRACT:
Disclosed is a timing generator of panel display and polarity arrangement control signal generation method therefor. The timing generator comprises a storage unit for storing a plurality of sets of polarity data and corresponding PAC signals, an operation unit for receiving display data, the sets of polarity data, and a corresponding PAC signal so that the operation unit can perform an inner product operation with respect to the polarity data and the display data for obtaining a sum of coupling voltages, and a comparison unit for comparing the sum of coupling voltages with a predetermined value, and outputting the PAC signal corresponding to the polarity data to a data driver if the sum of coupling voltages is smaller than the predetermined value.

REFERENCES:
patent: 6628256 (2003-09-01), Nishimura
patent: 6680722 (2004-01-01), Hiraki et al.
patent: 6734840 (2004-05-01), Fukutoku et al.
patent: 7027025 (2006-04-01), Takeda
patent: 7030843 (2006-04-01), Youn
patent: 2003/0197672 (2003-10-01), Yun et al.

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