Timing generator for IC testers

Details Timing generator for IC testers Timing generator for IC testers

1996-05-23

1998-01-20

Miska, Vit W.

Horology: time measuring systems or devices

Time interval

Electrical or electromechanical

327273, 327279, 371 27, G04F 800, H03K 5135, G06F 1100

Patent

active

057107440

ABSTRACT:
Output pulses of a period which is an integral multiple of the fundamental period T are generated by coarse timing generating means 13 in correspondence with an integral part Di of timing set data read out of a memory 11, and the output pulses are distributed by distributing means 17 to set- and reset-side delay means 26s and 26r under the control of a waveform generation control circuit 18. Pieces of data Dr and Ds, which are obtained by adding a fractional part of the timing set data read out of the memory and set-side skew absorbing data and reset-side skew absorbing data, respectively, are provided as delay control signals to the set- and reset-side delay means 26s and 26r. The pulse distributed to the set-side delay means 26s is delayed by logical delay means 27s for any one of delay times 0, 1T and 2T in accordance with the integral value of the data Ds, and the thus delayed pulse is further delayed by fine delay means 28s in accordance with the fractional value of the data Ds. Similarly, the pulse distributed to the reset-side delay means 26r is delayed by logical delay means 27r in accordance with the integral value of the data Dr and then delayed by fine delay means 28r in accordance with the fractional value of the data Dr. The outputs from the fine delay means 28s and 28r are applied to a flip-flop 25 to set and reset it to generate the waveform of a desired pattern.

REFERENCES:
patent: 5142223 (1992-08-01), Higashino et al.
patent: 5321700 (1994-06-01), Brown et al.
patent: 5488325 (1996-01-01), Sato et al.

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