Timing controller and controlled delay circuit for controlling t

Details Timing controller and controlled delay circuit for controlling t Timing controller and controlled delay circuit for controlling t

1996-07-30

2000-06-27

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

327261, 327263, 327264, 327269, 327272, 327276, 327278, 327285, 327149, 327158, 327161, H03H 1126

Patent

active

060811471

ABSTRACT:
A controlled delay circuit having a first gate chain, and a second gate chain. The first gate chain is used to measure a time difference between a changeover point of a first control signal and a changeover point of a second control signal. The second gate chain, which receives third signals generated in the first gate chain and representing the time difference, is used to provide an appropriate delay time from an input to an output depending on the time difference. The controlled delay circuit is capable of properly controlling the timing of the control signal according to the period of the control signal.

REFERENCES:
patent: 4999526 (1991-03-01), Dudley
patent: 5179303 (1993-01-01), Searles et al.
patent: 5216302 (1993-06-01), Tanizawa
patent: 5223755 (1993-06-01), Richley
patent: 5304953 (1994-04-01), Heim et al.
patent: 5355037 (1994-10-01), Andresen et al.
IBM Technical Disclosure Bulletin, "Active Tapped Delay Line Filter", W. Jutzi, vol. 12, No. 9, Feb. 1970.

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