Timing control circuit

Electrical transmission or interconnection systems – With nonswitching means responsive to external nonelectrical... – Temperature responsive

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307269, 307602, 328 55, 328 63, H03K 5135

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active

052870251

ABSTRACT:
A timing control circuit to be used for a phase locked loop (PLL) wherein, a plurality of delay circuit elements capable of controlling the delay connected in series are used as a signal delay circuit, delay values of all the delay circuit elements can be changed at the same time with the delay control signals of the respective delay circuit elements being commonly connected, and the delay control signal is controlled so as to select the desired delay with the combination of a selecting circuit, a bi-directional shift register circuit, a phase detecting circuit, a shift control circuit, a delay control circuit so as to realize the wide range of timing control, thereby to provide a function of adjusting the delay of a signal delay circuit for effecting a timing control operation.

REFERENCES:
patent: 4443765 (1984-04-01), Findeisen et al.
patent: 4618788 (1986-10-01), Backes et al.
patent: 4796095 (1989-01-01), Shimada
patent: 5049766 (1991-09-01), Van Diest et al.
patent: 5111086 (1992-05-01), Back
"The 68040 32-b Monolithic Processor", Anderson et al., IEEE Journal of Solid-State Circuits, vol. 25, No. 5, Oct. 1990, pp. 1178-1180.

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