Timing coinciding circuit simultaneously supplying two power sup

Details Timing coinciding circuit simultaneously supplying two power sup Timing coinciding circuit simultaneously supplying two power sup

1992-03-05

1994-02-15

LaRoche, Eugene R.

Static information storage and retrieval

Powering

365227, 36523006, 365233, 36518909, 365193, G11C 1134, H01L 2358

Patent

active

052873200

ABSTRACT:
An improved DRAM includes a main circuit and an output driver circuit, respectively, energized by externally applied two power supply voltages. The DRAM includes a timing coinciding circuit for making the supply-timing of the two power supply voltages to the circuits coincided to each other. When power supply voltage only is applied, output driver circuit has a tendency to consume an excessive penetrating current in response to an unstable output signal provided from main circuit. Even though the two power supply voltages are applied in different timing, the excessive current consumption in the output driving circuit is avoided, since timing coinciding circuit simultaneously starts and ends the supply of output power supply voltages.

REFERENCES:
patent: 5073874 (1991-12-01), Yamada et al.
patent: 5132931 (1992-07-01), Koker
patent: 5132932 (1992-07-01), Tobita
Elektronik 1/11, Jan. 1985, S. 67 and 68.

Affiliated with

Also associated with

Rating

Timing coinciding circuit simultaneously supplying two power sup does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Timing coinciding circuit simultaneously supplying two power sup, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Timing coinciding circuit simultaneously supplying two power sup will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1212759