Timing circuits with improved power supply jitter isolation...

Details Timing circuits with improved power supply jitter isolation... Timing circuits with improved power supply jitter isolation...

2008-04-22

2008-04-22

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S147000, C327S158000

Reexamination Certificate

active

07362151

ABSTRACT:
In accordance with the invention, feed forward compensation of jitter induced by power supply noise is incorporated into the negative feedback control loop of a timing synchronization circuit, such as a phase locked loop or delay locked loop. More particularly, the dependence of the circuitry in the negative feedback loop, such as the delay elements in a DLL or the oscillator in a PLL, to fluctuations in the power supply are counteracted by introducing into the feedback loop a signal component that is a function of the supply voltage and that will have the opposite effect from any direct fluctuations in the power supply voltage.

REFERENCES:
patent: 6246294 (2001-06-01), Gai
patent: 6476656 (2002-11-01), Dally et al.
patent: 6603340 (2003-08-01), Tachimori
patent: 6882580 (2005-04-01), Lim et al.
patent: 6888417 (2005-05-01), Moon et al.
patent: 7203260 (2007-04-01), Moon et al.

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