Timing circuit for varying the horizontal format of raster scann

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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358148, H04N 506

Patent

active

046865675

ABSTRACT:
A timing circuit adapted for use in a digital system that includes a raster scanned display device (14) adapted to scan a beam through a series of horizontal scan lines at a rate controlled by a horizontal sync signal. Each horizontal scan line comprises dots that can be individually illuminated. The time required for the beam to horizontally scan one dot is controlled by a dot clock signal. The digital system also includes means for producing row format data indicating the relationship between the horizontal sync signal and the time requried to horizontally scan one character area, and dot per character data indicating the horizontal dot width of one character area. The timing circuit comprises a generator (52) for producing a horizontal reference signal having a frequency corresponding to the desired frequency for the horizontal sync signal, and a phase lock loop for producing the horizontal sync and dot clock signals. The phase lock loop includes a frequency divider (54) for producing a character clock signal from the dot clock signal based upon the dot per character data, a controller (20) for producing the horizontal sync signal from the character clock signal based upon the row format data, and a phase control circuit (50) for producing the dot clock signal at a frequency such that the frequency of the horizontal sync signal is the same as the frequency of the horizontal reference signal.

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