Timing circuit and method of changing clock period

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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C365S189070, C365S189090

Reexamination Certificate

active

06865136

ABSTRACT:
The object of this invention is to provide a timing circuit that can change a clock period with low power consumption. The timing circuit includes a clock generator11, comparators12and13for comparing an inputted control voltage TDV and reference voltages VR, respectively, retaining circuits18and19for retaining outputs of the comparators, respectively, and circuits20, 21and22for producing timing pulses TDT as an output thereof based on outputs of the retaining circuits and clock signals outputted from the clock generator. Each comparator receives a first clock signal SS outputted from the clock generator and is operated only for a time corresponding to a short pulse width of the first clock signal SS.

REFERENCES:
patent: 5375093 (1994-12-01), Hirano
patent: 5774404 (1998-06-01), Eto
patent: 5903506 (1999-05-01), Blodgett
patent: 6560164 (2003-05-01), Kawai et al.
patent: 6597614 (2003-07-01), Nam et al.
patent: 6650581 (2003-11-01), Hong et al.
patent: 20030142566 (2003-07-01), Sohn et al.
patent: 20030210604 (2003-11-01), Jeong et al.
patent: 20030231523 (2003-12-01), Cho et al.

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