Timing apparatus for non-volatile MOS RAM

Static information storage and retrieval – Addressing – Sync/clocking

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365189, G11C 700

Patent

active

045717095

ABSTRACT:
A non-volatile memory and in particular the timing apparatus for generating sequence of signals needed for storing and recalling data is described. The memory cell employs an E.sup.2 cell which is coupled to a bistable (static) RAM cell. "State machine" logic is employed to obtain the proper sequence of signals needed for storing and recalling.

REFERENCES:
patent: 4208729 (1980-06-01), Williams
patent: 4210959 (1980-07-01), Wozniak
patent: 4503518 (1985-03-01), Iwahashi

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