Timing and control circuitry for flash analog to digital convert

Communications: electrical – Audible indication – Percussion-type sound producer

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340347DD, H03M 106

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active

047680164

ABSTRACT:
An analog to digital converter circuit includes encoder circuitry which employs a dummy bit line to derive timing signals employed in establishing stable, valid output digital signal information. For almost all binary codes of interest, the dummy bit line employed may actually comprise a portion of an otherwise unused bit line. The present invention is also distinguished in that it employs a clocked regenerative bit line sustainer circuit driven by dummy bit line derived timing signals. Additionally, the present invention also preferably employs a folded antiparallel architecture in which the bit lines are disposed in a generally U-shaped surrounding the parallel segments along their outer edges.

REFERENCES:
Dingwall, Andrew G. F., "Monolithic Expandable 6 Bit 20 MHz CMOS/SOS A/D Converter", IEEE Journal of Solid-State Circuits, vol. SC-14, Dec. 1979, pp. 926-932.
Joy, Andrew K., "An Inherently Monotonic 7-Bit CMOS ADC for Video Applications", IEEE Journal of Solid-State Circuits, vol. SC-21, No. 3, Jun. 1986, pp. 436-440.
Kumamoto, Toshio et al., "An 8-bit High-Speed CMOS A/D Converter", IEEE Journal of Solid-State Circuits, vol. SC-211, No. 6, Dec. 1986, pp. 976-981.

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