Bearings – Rotary bearing – Plain bearing
Patent
1989-10-13
1998-06-09
Louis-Jacques, Jacques H.
Bearings
Rotary bearing
Plain bearing
384230, 3842305, 3842319, 38423221, 384DIG1, G06F 1500
Patent
active
057650101
ABSTRACT:
A timing and control circuit and method for a synchronous vector processor (SVP) device having a plurality of one-bit processor elements organized in a linear array. This circuit includes a master controller circuit, a vertical timing generator circuit, a constant generator circuit, a horizontal timing generator circuit and an instruction generator circuit.
REFERENCES:
patent: 3675208 (1972-07-01), Bard
patent: 4660155 (1987-04-01), Thaden et al.
patent: 4739474 (1988-04-01), Holsztynski et al.
patent: 4771279 (1988-09-01), Hannah
patent: 4985848 (1991-01-01), Pfeiffer et al.
patent: 4991120 (1991-02-01), Vaiana
patent: 5083119 (1992-01-01), Treuett et al.
Gharachorloo, Nader, et al., A Super Buffer: A Systolic VLSI Graphics Engine For Real-Time Raster Image Generation, 1985 Chapel Hill Conference on VLSI, pp. 285-305.
Fisher, Allan L., et al., Architecture Of A VLSI SIMD Processing Element, IEEE International Conference on Circuits and Design, 1987, pp. 324-327.
van Rowermud, A.H.M., et al., A General-Purpose Programmable Video Signal Processor, ICCE 1989 VSP/Phillips.
Chin, D., et al., The Princeton Engine: A Real-Time Video System Simulator, IEEE Transactions on Consumer Electronics, vol. 34, No. 2, May 1988, pp. 285-297.
Nakagawa, Shin-ichi, et al., A 50ns Video Signal Processor, IEEE International Solid-State Circuits Conference, Digest of Technical Papers, vol. XXXII, 1989, pp. 168-169, 328.
Kikuchi, Kouichi, et al., A Single-Chip 16-BIT 25ns RealTime Video/Image Signal Processor, IEEE ISSCC Digest of Technical Papers, vol. XXXII, 1989, pp. 170-171, 329.
Wilson, Stephens S., The PIXIE-5000 -A Systolic Array Processor, IEEE 1985, pp. 477-483.
Davis, Ronald, et al., Systolic Array Chip Matches The Pace Of High-Speed Processing, Electronic Design, Oct. 21, 1984, pp. 207-218.
Hannaway, Wyndham, et al., Handling Real-Time Images Comes Naturally To Systolic Array Chip, Electronic Design, Nov. 15, 1984, pp. 289-300.
Smith Jr., Winthrop W. et al., Systolic Array Chip Recognizes Visual Patterns Quicker Than A Wink, Electronic Design, Nov. 29, 1984, pp. 257-266.
Wallis, Lyle, Associative Memory Calls On The Talents Of Systolic Array Chip, Electronic Design, Dec. 13, 1984, pp. 217-226.
Fisher, Allan L., et al, Real-Time Image Processing On Scan Line Array Processors, IEEE 1985, pp. 484-489.
Fisher, Allan L., Scan Line Array Processor For Image Computation IEEE 13th Annual International Symposium on Compu. Arch., Compu. Arch. News, vol. 14, No. 2, Jun. 1986, pp. 338-345.
Waltz, David 1. Applications Of The Connection Machine, IEEE Computer Magazine, Jan. 1987, pp. 85-97.
Webber, Donald M. et al., Circuit Simulation On The Connection Machine, 24th ACM/IEEE Design Automation Conference, 1987, pp. 108-113.
Hillis, W. Daniel, text book excerpt, The Connection Machine, The MIT Press series in artificial intelligence -THESIS (PH.D.) -MIT, 1985, pp. 18-28.
Fountain, T.J., text book, Integrated Technology For Parallel Image Processing, "Plans for the CLIP7 Chip.", pp. 199-214, Chapter 13.
Becker Manfred
Childers Jim
Chung Moo-Taek
Miyaguchi Hiroshi
Donaldson Richard L.
Kesterson James C.
Louis-Jacques Jacques H.
Marshall, Jr. Robert D.
Mohamed Ayni
LandOfFree
Timing and control circuit and method for a synchronous vector p does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Timing and control circuit and method for a synchronous vector p, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Timing and control circuit and method for a synchronous vector p will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2214349