Multiplex communications – Wide area network – Packet switching
Patent
1994-10-26
1996-05-07
Hsu, Alpus H.
Multiplex communications
Wide area network
Packet switching
370 68, 370108, H04Q 1104
Patent
active
055153712
ABSTRACT:
In a time division multiplexed digital communication network through which time division multiplexed data signals are routed over respectively different transmission paths of the network, the paths having respectively different transmission delays, to a bonding receiver at a destination end of the network, the bonding receiver including a digital signal processor for controlling the operation of the bonding receiver, bonding compensation that is normally carried out entirely by the digital signal processor is transferred from the digital signal processor to an auxiliary delay path, which is coupled to the receive path from the network. The auxiliary delay path is controlled by the direct memory access (DMA) functionality of the digital signal processor to transfer selected data time slots through the auxiliary delay path. The output of the auxiliary delay path is controllably multiplexed with undelayed time slots, so as to be re-injected into the receive path and time division multiplex aligned with and synchronously interleaved with the slower channel's time slots upstream of the input of the digital signal processor.
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patent: 5305322 (1994-04-01), Kabaya
patent: 5307380 (1994-04-01), Kume
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Adtran
Hsu Alpus H.
Ngo Ricky Q.
Wands Charles E.
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