Timeslot interchange network

Multiplex communications – Pathfinding or routing – Through a circuit switch

Patent

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Details

H04Q 1100

Patent

active

061608076

ABSTRACT:
A time slot interchange having a data channel memory, a channel circuit, having a write address output, the write address output connected to the data channel memory, a signal processing circuit, having a channel input coupled to the data channel memory, a gain input, and an output coupled to the time division multiplexed signal output port, and a connection memory, including a unique read channel field comprising a read address portion and a gain value portion for each data channel to be output by the time slot interchange network. The connection memory has an input connected to the write address output of the channel circuit, a read address output connected to the data channel memory, and a gain value output connected to the gain input of the signal processing circuit.

REFERENCES:
patent: 4545053 (1985-10-01), Raamot
patent: 4546468 (1985-10-01), Chrismas et al.
patent: 4937820 (1990-06-01), Kawula
patent: 5331632 (1994-07-01), Aaron et al.
patent: 5905735 (1999-05-01), Wille
patent: 5953330 (1999-09-01), Canniff et al.
patent: 6002685 (1999-12-01), Wille et al.

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