Patent
1996-02-05
1998-06-16
Butler, Dennis M.
395559, G06F 114
Patent
active
057685720
ABSTRACT:
A timing control mechanism designed for a high performance network wherein many of the timers are cancelled or reset prior to expiring. This method and apparatus enable the cancels and resets to occur with minimal impact to the system performance. An intermediate work queue is used, where timer events are posted prior to being scheduled into the timer queues by the timer process. Thus, many of the cancels or resets will be implemented simply by changing the status of events in this work queue, minimizing the impact on the timer queues and timers. The timer process processes the work queue before processing any timer events.
REFERENCES:
patent: 4589093 (1986-05-01), Ippolito et al.
patent: 4908750 (1990-03-01), Jablow
patent: 5193186 (1993-03-01), Tamaki et al.
patent: 5386561 (1995-01-01), Huynh et al.
patent: 5533020 (1996-07-01), Byrn et al.
George David Glenn
Reynolds Samuel
Butler Dennis M.
International Business Machines - Corporation
Ray-Yarletts Jeanine S.
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