Timer input control circuit and counter control circuit

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Particular input circuit

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Details

377111, 377115, 377116, 3072722, H03K 1716

Patent

active

052336387

ABSTRACT:
A circuit having a delay circuit provided with a gate for converting the output signal of an SR flip-flop into a signal with a delay equal to or more than the clock pulse width enough for count operation and leading the logical addition between the signal and system clock and the logical multiplication between the signal and counter write signal to the direct reset input of a transparent latch 7 and for realizing read-on-the-fly or write-on-the-fly operation even if timer input does not synchronize with the system clock.

REFERENCES:
patent: 4746915 (1988-05-01), Sekiya
patent: 4761801 (1988-08-01), Underwood
patent: 4940909 (1990-07-01), Mulder et al.
patent: 4968906 (1990-11-01), Pham et al.
patent: 4974241 (1990-11-01), McClure et al.
patent: 5077764 (1991-12-01), Yamashita
patent: 5130568 (1992-07-01), Miller et al.

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