Horology: time measuring systems or devices – Chronological – With simultaneous time indicating means
Patent
1998-09-21
2000-04-04
Miska, Vit
Horology: time measuring systems or devices
Chronological
With simultaneous time indicating means
368250, 377 39, G04B 2302, G04C 2100, H03K 302
Patent
active
06046965&
ABSTRACT:
A coincidence signal is output when coincidence of a timer counter with the set value of a comparison register is detected by a coincidence detecting circuit and the coincidence signal is input to the external CPU as an interruption signal to execute a CPU to start an interruption routine. In the interruption routine, a reverse enable flag is set, a flag indicating permission to reverse an output signal when the value of a key counter is larger than the value of a buzzer counter and a reverse enable flag is set, a flag indicating prohibition of reversing the output signal when the value of the key counter is smaller than that of the buzzer counter.
REFERENCES:
patent: 4805199 (1989-02-01), Muramatsu
"Hardware Support For An Operating System Timer", IBM Technical disclosure Bulletin, vol. 34, No. 10B, March 1992, pp. 237-238.
"Simulation of Multiple Timers Using One Actual Timer", IBM Technical Disclosure Bulletin, vol. 38, No. 3, March 1995, pp. 301-303.
Miska Vit
NEC Corporation
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