Timer circuit with programmable decode circuitry

Details Timer circuit with programmable decode circuitry Timer circuit with programmable decode circuitry

1996-09-20

1998-11-24

Wambach, Margaret Rose

Electrical pulse counters, pulse dividers, or shift registers: c

Applications

Measuring or testing

327175, 327294, H03K 104

Patent

active

058418270

ABSTRACT:
A timer circuit for providing output pulses of an adjustable duration based upon stored decode parameters. The circuit has a timer element which generates a periodic timing signal. Preferably the frequency of the periodic timing signal is also adjustable. A frequency divider is clocked by the timing signal and provides a plurality of frequency divided outputs. A decode circuit combines selected ones of the frequency divided outputs based upon decode parameters and generates a timer circuit output pulse having a duration determined by the frequency divided outputs selected by the decode parameters. The decode parameters are stored in a non-volatile data storage unit so that the timer output pulse will remain the same after power interruption.

REFERENCES:
patent: 4584494 (1986-04-01), Arakawa et al.
patent: 4620312 (1986-10-01), Yamashita
patent: 4812687 (1989-03-01), Larson et al.
patent: 5003194 (1991-03-01), Engelhard
patent: 5047664 (1991-09-01), Moyal
patent: 5130582 (1992-07-01), Ishihara et al.
patent: 5371770 (1994-12-01), Sakuma
patent: 5469100 (1995-11-01), Wuidart et al.

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