Timer circuit for stretching the duration of an input pulse

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307265, 307290, 307234, 328 58, H03K 504, H03K 3017

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active

053090349

ABSTRACT:
A timer circuit is provided including a self-holding circuit that includes a reset delay circuit for delaying an input pulse by a prescribed time. The output of the self-holding circuit is caused to fall by the rising edge of the input pulse and to rise by the falling edge of the input pulse or the rising edge of a pulse fed back through the reset delay circuit whichever occurs last. Since the pulse duration can be stretched up to a length equal to the reset delay time by the action of the self-holding circuit, the possibility of the input pulse being split through a pulse stretching circuit is eliminated.

REFERENCES:
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patent: 5107137 (1992-04-01), Kinugasa et al.
patent: 5191245 (1993-03-01), Kang
RCA Techinal Notes, Keller et al, "DC Coupled Pulse Stretcher", Sep. 28, 1970, pp. 1-3.

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