Timer circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

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Details

307594, 307605, 307246, H03K 17296, H03K 17687

Patent

active

047288299

ABSTRACT:
A timer circuit which is used for write and erase time control of a semicondcutor memory, and configured so as to transfer a charge of a charge storage capacitor to a charge pump capacitor through a first transfer gate thereafter to repeatedly effect a discharge operation by using a second transfer gate thereby to gradually reduce a charge of the charge storage capacitor, thus performing a timer operation, characterized in that there is provided a circuit for making an adjustment such that a voltage applied to the charge pump capacitor is smaller than a voltage applied to the charge storage capacitor.

REFERENCES:
patent: 4584494 (1986-04-01), Arakawa et al.

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