Timed make-before-break circuit for analog switch control

Details Timed make-before-break circuit for analog switch control Timed make-before-break circuit for analog switch control

1992-11-12

1994-10-11

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307243, 307445, 307584, H03K 1716

Patent

active

053550366

ABSTRACT:
A timed make-before-break circuit for analog switch control is provided. The invention contains one or more delay circuit and more than one logic gate. Each logic gate has one logic gate input line connected to a delay circuit input line and another logic gate input line connected to a delay circuit output line. The logic gate input lines are connected to the delay circuit input line and the delay circuit output line from the same delay circuit. The invention also has more than one switch. Each switch has an input control line connected to a logic gate output line.

REFERENCES:
patent: 4057738 (1977-11-01), Nishimura
patent: 4181861 (1980-01-01), Maehashi
patent: 4198579 (1980-04-01), Ebihara et al.
patent: 4561545 (1985-12-01), Carlow
patent: 5001374 (1991-03-01), Chang
patent: 5032739 (1991-07-01), Koh
patent: 5148121 (1992-09-01), Uchida
patent: 5196733 (1993-03-01), Shin

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