Timed alarming using logical inverters

Details Timed alarming using logical inverters Timed alarming using logical inverters

1980-02-28

1981-02-24

Waring, Alvin H.

Communications: electrical

Condition responsive indicating system

Specific condition

340529, 340644, 340653, 3403091, G08B 1322

Patent

active

042530946

ABSTRACT:
A triggered before disarmed alarm system uses CMOS circuitry having a hex-inverter integrated circuit with the output logical inverter coupled to the output transistor by a timing circuit that may be selected through control of the presence and absence of a D.C. operating potential to selectively provide pulsating or continuous potential, respectively, to the output transistor that renders the output transistor intermittently and continuously conductive, respectively, in the presence of an alarm signal. Intercoupling circuitry includes resistance capacitance networks with the capacitance shunted by Zener diodes having a voltage rating corresponding substantially to the voltage rating of the capacitance shunted.

REFERENCES:
patent: 4136334 (1979-01-01), Seifers

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