Time switching circuit

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370 66, H04J 302

Patent

active

053814061

ABSTRACT:
A time switching circuit includes n data memories (n being an integer equal to or greater than 2), a respective address control memory for each data memory, and a control section. Each of the n data memories has n input ports corresponding to n data strings and one output port. The n input ports are multi-connected. The respective address control memory of each data memory writes the n data strings in the data memories as written data strings. The control section selectively reads out the written data strings from each of the data memories and outputs the written data strings as readout data strings.

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patent: 5197063 (1993-03-01), Nakano et al.

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