Time switch with a dual memory structure-type control memory

Multiplex communications – Wide area network – Packet switching

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Details

370 66, H04J 324

Patent

active

047590106

ABSTRACT:
A time switch with a dual structure-type control memory utilizing a time division time switch. The switch is equipped with a speech memory unit into which digital signals to be interchanged are temporarily written, and a control memory unit into which addresses to be accessed by the speech memory unit are written. The control memory unit has first and second memories. Each memory has an input/output section connected to a memory controller. The memories are set during hard and soft cycles so that when either one of the memories is set in a hard cycle the other memory is set in a soft cycle. The hard cycle is a speech-control data read-only mode. The soft cycle is a speech-control data read-write mode under control from the memory controller.

REFERENCES:
patent: 3761894 (1973-09-01), Pilc et al.
patent: 3967070 (1976-06-01), Srivastava et al.
patent: 4402078 (1983-08-01), Athenes et al.
patent: 4510597 (1985-04-01), Lewis

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