Time standard circuit with delay line oscillator

Details Time standard circuit with delay line oscillator Time standard circuit with delay line oscillator

1995-08-18

1997-09-30

Pascal, Robert

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

331111, 331143, 331 57, 327182, 327277, 327276, 327244, 327284, H03K 513, H03L 700

Patent

active

056730055

ABSTRACT:
This is an integrated timing circuit which can be formed on a microprocessor chip. The circuit uses an oscillator having a delay line and a variable delay element. The delay line and the delay element vary together to hold the velocity of signal propagation in the circuit substantially constant. The output, of the oscillator is coupled to one input of a comparator circuit. A series of inverter circuits, each of which has a respective variable delay are connected to the input of the oscillator and to a second input of the comparator circuit such that the comparator circuit senses the difference between the output signal of the inverter series and the output signal of the oscillator circuit to provide an error signal proportional to the sensed difference. A feedback loop is provided, to the variable delay means in said oscillator and to the inverter circuits to correct for the sensed difference, to establish a uniform and stable time standard at the output of the oscillator.

REFERENCES:
patent: 4899071 (1990-02-01), Morales

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