Time slot end predictor

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

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Details

307208, 307293, 307DIG5, 328 72, 328129, H03K 1334, H03K 515, H03K 1908, H03K 1716

Patent

active

041963571

ABSTRACT:
For use in a microprocessor on a single semiconductor chip, a circuit responsive to first and second non-overlapping time signals for removing timed delay in a first data line. A first enhancement-type field effect device has its drain coupled to the first data line and its gate providing an input for the first timing signal. A second enhancement-type field effect device has its drain coupled to the source of the first device and its source coupled to a source voltage. The source voltage is at ground potential. A third enhancement field effect device has its drain coupled to the first data line, its source coupled to the gate of the second device, and its gate providing an input for the second timing signal.

REFERENCES:
patent: 3713114 (1973-01-01), Linton et al.
patent: 3916169 (1975-10-01), Cochran et al.
patent: 3964030 (1976-06-01), Koo
patent: 4021781 (1977-05-01), Caudel

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