Time-slot assigner multiplexer

Multiplex communications – Wide area network – Packet switching

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Details

3701101, H04Q 1104, H04J 312

Patent

active

047714182

ABSTRACT:
For each channel, a pair of buffers permits "non-slip" transfer of data signals on and off a bus synchronized with signals on a time-division multiplexed pulse-code modulation (PCM) highway. A source buffer consisting of a serial-in, parallel-out register and two parallel-in, parallel-out registers receives signals from one of the PCM channels and transmits these signals onto a bus synchronized with a data-routing multiplexer employed within a digital exchange controller employing the device. A destination buffer consisting of two parallel-in, parallel-out registers and a parallel-in, serial-out register receives signal from the bus and, in conjunction with a transmit multiplexer, generates the signals on the PCM highway.

REFERENCES:
patent: 4627047 (1986-12-01), Pitroda et al.
patent: 4639910 (1987-01-01), Toegel et al.
patent: 4665517 (1987-05-01), Widmer

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