Time-shared, multi-phase memory system with error checking and d

Details Time-shared, multi-phase memory system with error checking and d Time-shared, multi-phase memory system with error checking and d

1977-05-31

1980-11-18

Shaw, Gareth D.

Boots, shoes, and leggings

G0GF 1300

Patent

active

042349184

ABSTRACT:
A multi-phase, bit addressable, variable field memory system partitioned into a plurality of individually addressable memory stacks and employing time-shared accessing circuitry as well as time shared error detection and data correction means, whereby serial memory stack accessing along with serial error checking and correction are achieved without significantly increasing the overall memory accessing time over that obtained for parallel accessing.

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patent: 4028668 (1977-06-01), Riikowen
patent: 4037215 (1977-07-01), Birney et al.
patent: 4048481 (1977-09-01), Bailey Jr. et al.

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