Time-sensitive packet processor for an ATM switch

Multiplex communications – Pathfinding or routing – Switching a message which includes an address header

Reexamination Certificate

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Details

C370S902000

Reexamination Certificate

active

06393025

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to converting a time-sensitive packet into one or more Asynchronous Transport Mode (ATM) data cells for transport over an ATM network.
BACKGROUND OF THE INVENTION
The Telecommunication Standardization Section (Study Group 13) of the well-known International Telecommunication Union has proposed a standard for processing time-sensitive packets, such as voice packets, for transport over an ATM network. This standard is known as ITU-T Recommendation 1.363.2, and specifies a BISDN ATM Adaptation Layer Type 2 (AAL
2
) protocol for bandwidth-efficient transmission of low-rate, short and variable length packets in delay sensitive applications. To implement the protocol, an ATM switch that receives a time-sensitive packet will most likely (a) divide the packet into one or more segments to form the payloads of respective ATM cells, (b) append an ATM cell header to each such cell and (c) output the cells in sequence to an associated ATM network for delivery to a destination ATM switch. The destination ATM switch would re-assemble the time-sensitive packet from the data cells that it receives, and forwards the assembled packet to the intended destination.
SUMMARY OF THE INVENTION
I have recognized that, to meet the requirement of transporting a low-rate, short, variable length time-sensitive packet over an ATM network, the reformatting of the packet into ATM cells must be done very quickly and efficiently.
Specifically, when a time-sensitive packet is received by an ATM switch from a source of packets via an incoming trunk, the switch indexes a translation table using the trunk identity to obtain an assigned AAL
2
channel and a virtual channel. The switch then converts the received packet to a particular data unit containing at least the assigned AAL
2
channel within a virtual channel, and then determines, as a function of the virtual channel index, a virtual path identifier (VPI) and virtual circuit identifier (VCI). The switch then processes, e.g., combines, splits or segments, the particular data unit to form the payload for one or more ATM cells. The switch then forms an ATM cell header containing at least the VPI and VCI, appends the header to each such payload and outputs each cell, in turn, to an output carrying the identified channel.


REFERENCES:
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patent: 6075798 (2000-06-01), Lyons et al.
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