Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2006-01-10
2006-01-10
Mai, Tan V. (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
06985919
ABSTRACT:
The present invention may significantly reduce the number of iteration of the time recursive IFFT structure. First, the real and imaginary part of the input signal are modified based on the symmetric and anti-symmetric. Then, they are mixed together by an adder and fed into the lattice module. Next, an IFFT is performed on the modified input data sequence to generate a transformed sequence. Through the symmetric and anti-symmetric properties, the redundant terms may be eliminated.
REFERENCES:
patent: 5633817 (1997-05-01), Verhenne et al.
patent: 6157938 (2000-12-01), Wu et al.
patent: 2003/0212722 (2003-11-01), Jain et al.
patent: 2004/0162866 (2004-08-01), Malvar
“An Improved Time-Recursive Lattice Structure for Low-Latency IFFT Architecture in DMT Transmitter” by Chi-Li Yu, Dept. of Electrical Engineering , National Central University, Taiwan and An-Yeu Wu, Dept. of Electrical Engineering, National Taiwan University, Taiwan, pp. IV-250-253.
Wu An-Yeu
Yu Chi-Li
Industrial Technology Reseach Institute
Mai Tan V.
Thomas Kayden Horstemeyer & Risley
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