Time recovery circuitry in a modem receiver

Pulse or digital communications – Repeaters – Testing

Patent

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Details

375118, 333 18, 364724, H04B 304

Patent

active

043441769

ABSTRACT:
Modem receiver apparatus having circuitry for receiving, demodulating, and decoding, at a first rate of 1/T bauds per second, a modulated double sideband carrier signal encoded to represent digital bits, wherein the received signal is converted to a stream of digital samples, the samples occurring at a sample rate higher than 1/T per second, and having timing recovery circuitry comprising phase-splitting filter circuitry connected to split the modulated double-sideband carrier signal sample stream into a pair of modulated carrier signal sample streams, the carrier frequencies associated with the pair of streams being equal but 90.degree. apart in phase, first circuitry connected to the output of the filter circuitry for generating a timing signal, and second circuitry connected in parallel with the first circuitry to the output of the filter circuitry for demodulating the output of said filter circuitry, the first circuitry comprising first circuitry for additionally filtering the output of said filter circuitry and providing, at a second rate at least as high as 2/T per second, successive values representative of the absolute value of the additionally filtered output, and second circuitry for generating the timing signal from the successive values provided by said first circuitry.

REFERENCES:
patent: 3914691 (1975-10-01), Meadors
patent: 3978407 (1976-08-01), Forney
patent: 4004226 (1977-01-01), Qureshi
patent: 4089061 (1978-05-01), Milewski
patent: 4227252 (1980-10-01), Godard
patent: 4237554 (1980-12-01), Gitlin
D. L. Lyon "Envelope-Derived Timing Recovery in QAM and SQAM Systems", IEEE Transactions on Communications, Nov. 1975, pp. 1327-1331.
K. Watanabe, K. Inoue and Y. Sato, "A 4800 Bit/s Microprocessor Data Modem", IEEE Transactions on Communication, vol. Com-26, No. 5, May 1978, pp. 493-498.

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