Pulse or digital communications – Synchronizers
Reexamination Certificate
2002-11-21
2004-08-10
Chin, Stephen (Department: 2631)
Pulse or digital communications
Synchronizers
C375S147000
Reexamination Certificate
active
06775341
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the field of communication systems, and more particularly, to a time recovery circuit and method for synchronizing timing of a signal in a receiver to timing of the signal in a transmitter in a spread spectrum communication system.
BACKGROUND OF THE INVENTION
In a spread spectrum communication system, downlink transmissions from a base transceiver station (BTS) to a wireless communication device, such as a mobile station (MS), include a pilot channel and a plurality of traffic channels. The pilot channel is shared by all users. Each traffic channel is intended for a single user. Therefore, each traffic signal is spread using a code known by both the base station and mobile station. The pilot signal is spread using a code known by the base station and all mobile stations. Spreading the pilot and traffic signals spreads the spectrum of transmissions in the system.
One example of a spread spectrum communication system is a cellular radiotelephone system according to Telecommunications Industry Association/Electronic Industry Association (TIA/EIA) Interim Standard IS-95, “Mobile Station-Base Station Compatibility Standard for Dual-Mode Wideband Spread Spectrum Cellular System” (“IS-95”). Individual users in the system use the same frequency but are distinguishable from each other through the use of individual spreading codes. Other spread spectrum systems include radiotelephone systems operating at 1900 MHz, commonly referred to as DCS1900. Other radio and radiotelephone systems use spread spectrum techniques as well.
IS-95 is an example of a direct sequence code division multiple access (DS-CDMA) communication system. In a DS-CDMA system, transmissions are spread by a pseudorandom noise (PN) code. One data symbol consists of several chips, where the chip is the spread spectrum minimal-duration keying element. A key system parameter is the chip duration or chip time (T
c
). In an IS-95 system, the chip clock rate is 1.2288 Mega-chips per second, equivalent to a T
c
of about 0.814 &mgr;sec/chip.
Receivers for use in spread spectrum communication systems commonly employ RAKE receivers. A RAKE receiver includes two or more finger receivers that independently receive radio frequency (RF) signals. Each finger estimates channel gain and phase and demodulates the RF signals to produce traffic symbols. The traffic symbols of the finger receivers are combined in a symbol combiner to produce a received signal.
Timing jitter and timing error of Delay-Lock Loop (DLL) is critical in demodulating received signals in CDMA systems, especially Quadrature Amplitude Modulated (QAM) signals. Receiver DLL timing error may increase the Inter Symbol Interference (ISI) caused by the receive base band matched filter. When-higher order modulation schemes are used to increase the data transmission rate, the degradation due to the time recovery error can be more significant.
Current widely used time recovery circuits are based on an early-late DLL structure that applies a control loop (which can be first or second order) to reduce the difference between cross correlations of the early and late signals and the PN sequence. Because of the symmetrical property of the early and late cross correlations represented in the S-curve, the receiver and the transmitter is synchronized when the difference between the early and late correlations is zero. Such a DLL structure can be modeled as a closed loop control system as shown in
FIG. 1
, under the ideal condition that the DLL can make arbitrary small time adjustments. In
FIG. 1
, t is the time change that the DLL needs to track and u is the noise that the control loop needs to suppress. The time change is tracked as quickly as possible when the closed loop system has a wide bandwidth. However, noise is best suppressed when the closed loop system has a narrow bandwidth. These contradictory performance requirements make it difficult to design a control system. For the DLL in current CDMA systems, the worst time tracking error has been shown to be at least a sixteenth of the chip rate (T
c
/16). In CDMA specifications, a time tracking error of an eighth of the chip rate (T
c
/8) is commonly assumed. Another drawback of the conventional DLL design is that the gain scale factor k
d
and the noise u depend on the received signal to noise ratio (SNR) (related to the transmitted signal power), fading channel gain and the Additive White Gaussian Noise (AWGN) in the channel. This means that the optimally designed closed loop system has to be gain adaptive to the estimated SNR.
Thus, there is a need for an improved time recovery circuit and method for synchronizing timing of a signal in a receiver to timing of the signal in a transmitter by reducing the timing jitter and timing error of a DLL.
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Chen Jiangnan (Jason)
Wang Fan
Zhou Philip Yuanping
Chin Stephen
Motorola Inc.
Pace Lalita W.
Williams Lawrence
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