Radiant energy – Photocells; circuits and apparatus – Photocell controlled circuit
Reexamination Certificate
2001-10-03
2003-04-01
Allen, Stephone (Department: 2878)
Radiant energy
Photocells; circuits and apparatus
Photocell controlled circuit
C348S241000
Reexamination Certificate
active
06541751
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a system on a chip (SOC) image sensor, and more particularly to a method for reducing noise in an SOC image sensor.
2. Description of the Related Art
An imaging system for capturing an image of a scene and generating signals indicative of the image generally includes an image acquisition component and an image processing component. The image acquisition component typically a photosensitive device, such as a charged-coupled device (CCD) or a Complementary Metal-Oxide Semiconductor (CMOS) device. The photosensitive device reacts to light reflected from the scene and can translate the strength of that reaction into electronic charging signals that are digitized. Because the image is actually a collection of numeric data, the image data can easily be provided to the image processing component, such as a microprocessor, where the image can be manipulated for more artistic effects.
Conventional imaging systems are usually built using separate integrated circuits for the different components constituting the imaging system. Thus, the image acquisition component including the image sensor and the supporting circuitry may be built on one integrated circuit while the image processing component including a signal processing unit may be built on another integrated circuit. As a result of using separate integrated circuits, noise generated in one component does not coupled easily to other components of the imaging system. This is because noise coupling generally occurs through the power supply lines within an integrated circuit or through the substrate on which the integrated circuit is built. As the components are separate, noise generated in one integrated circuit does not couple easily to another integrated circuit.
A system on a chip (SOC) refers to an integrated circuit where the electronics for a complete, working product are contained on a single chip. In other words, an SOC is an integrated circuit where the complete functions of a product are integrated onto a single integrated circuit core. For example, an SOC for an image sensor is an integrated circuit including all the electronics for a complete imaging system. An SOC image sensor may include a sensor array, supporting readout circuitry, analog-to-digital conversion (ADC) circuitry, and image processing circuitry. Mixed signal SOCs are available for applications such as cell phones, modems and analog-to-digital converters.
There are obstacles to overcome before an SOC for an image sensor can be successfully developed. For example, when various functions of an imaging system are integrated onto a single integrated circuit, noise coupling between the different components of the integrated circuit can negatively impact circuit performance, particularly for noise sensitive circuits. For example, the analog-to-digital conversion (ADC) circuit in a digital image sensor is one such noise sensitive component.
In general, there are four basic operations associated with a conventional digital imaging system. First, there is an integration process where photodetectors in an area image sensor are exposed to light, generating analog signals indicative of the light intensity level of a scene being captured. Then, there is a readout process where the analog signals generated by the photodetectors are read out of the image sensor. There is an ADC process where the analog signals are converted into digital signals, also known as pixel data or digital pixel data. Depending on the types of image sensor, the ADC process can occur before or after the readout process. Finally, the pixel data is provided to an image processor for processing.
In a conventional imaging system, such as one employing an active pixel sensor as the image sensor, these basic operations generally occur in a pipeline, scrolling fashion.
FIG. 1
is a timing diagram illustrating the operations of a conventional digital image sensor. As shown in
FIG. 1
, while light integration is being carried out for the pixels in Row N, the readout process is outputting analog data from Row N-
1
. Also at the same time, the ADC process is converting signals in Row N-
2
, readout at a previous cycle, to digital pixel data. Finally, also at the same time, the image processor is operating on the digital pixel data on Row N-
3
, readout and digitized in previous cycles. If the imaging system is made into an SOC, all these operations will occur at the same time on the same piece of semiconductor substrate. Thus, noise generated by the image processing operations can be coupled to circuitry handling the ADC operations. Because the ADC circuit is particularly noise sensitive, such noise coupling can negatively impact the accuracy of the ADC operation. In fact, noise coupling to the ADC circuit can reduce the signal to noise ratio of the ADC circuit and consequently degrade the image quality. Therefore, in order to successfully build an SOC for an image sensor, it is imperative to isolate noise generated by noise-inducing circuits of the SOC from noise sensitive circuitry of the SOC.
Existing techniques to isolate noise in an SOC typically include physical isolation of the different noise sources. For example, the power supply lines for different circuit blocks in an integrated circuit may be physically isolated to decouple the noise generated by the different circuit blocks. Power supply line isolation can start from the silicon substrate and extend to the external package pins to ensure complete decoupling. However, while isolation of power lines may be effective in decoupling circuit noise, power line isolation can induce other circuit weaknesses, such as reducing immunity to electrostatic discharge.
Other techniques for noise isolation involve physically isolating the noise-inducing parts of the circuits. However, these physical isolation techniques often lead to larger die area for implementing the circuits and isolation structures, thus increasing the die size of the integrated circuit and the associated manufacturing cost.
Therefore, it is desirable to provide an improved noise isolation technique, particularly for use in building an SOC for an image sensor.
SUMMARY OF THE INVENTION
According to one embodiment of the present invention, a system on a chip for an image sensor includes a sensor array, a readout circuit, a data memory and a processor. The sensor array includes a two-dimensional array of pixel elements, that outputs digital signals as pixel data representing an image of a scene. The sensor array includes a plurality of analog-to-digital conversion (ADC) circuits where each ADC circuit is coupled to one or more pixel elements in the sensor array. The readout circuit is in communication with the sensor array for reading the pixel data from the sensor array. The data memory is in communication with the sensor array for storing the pixel data. The processor is in communication with the data memory for processing the pixel data. In operation, the system on a chip deactivates at least one noise-inducing circuit while a noise-sensitive circuit is activated.
In one embodiment, the noise-sensitive circuit is one or more of the ADC circuits, and the noise-inducing circuit is one of the readout circuit, the data memory and the processor.
According to another aspect of the present invention, the operations of the noise-sensitive circuit and operations of the noise-inducing circuit are time multiplexed.
The method and apparatus of the present invention is effective in decoupling noise between noise-inducing circuits and noise-sensitive circuits on a system on a chip for an image sensor. By time multiplexing the noisy functions with the noise-sensitive function, circuit noise generated by noise-inducing circuits can be isolated from the noise-sensitive circuits, thereby improving the performance of the system on a chip.
The present invention is better understood upon consideration of the detailed description below and the accompanying drawings.
REFERENCES:
patent: 5461425 (1995-10-01), Fowler et al.
patent: 5801
Allen Stephone
Cook Carmen C.
Patent Law Group LLP
Spears Eric J.
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