Data processing: structural design – modeling – simulation – and em – Emulation
Reexamination Certificate
2005-01-11
2005-01-11
Teska, Kevin J. (Department: 2123)
Data processing: structural design, modeling, simulation, and em
Emulation
C702S125000, C703S016000, C703S019000, C703S020000, C703S023000, C703S025000, C703S027000, C712S029000, C712S035000, C712S203000, C712S206000, C712S223000, C712S245000, C713S400000, C716S030000, C716S030000
Reexamination Certificate
active
06842728
ABSTRACT:
An apparatus and method utilize a buffer interposed in a common signal path between asynchronous clock domains in a hardware-based logic emulation environment to manage the communication of time-multiplexed data signals between the clock domains during hardware-based emulation. The buffer is effectively used to latch each data signal communicated across the common signal path so that the clock domain that receives the signals can retrieve each such signal at appropriate points in the receiver clock domain's evaluation cycle. Independently-controlled write/read pointers are maintained in a buffer control circuit to independently address the buffer for the transmitter and receiver sides of an asynchronous communication path. Locations in the buffer are associated with specific steps in the evaluation cycles of each of the transmitter and receiver clock domains, and the write/read pointers are managed to respectively write and read data to and from the locations in the buffer based upon the current evaluation steps being performed within the respective evaluation cycles of the transmitter and receiver clock domains.
REFERENCES:
patent: 5596742 (1997-01-01), Agarwal et al.
patent: 5649167 (1997-07-01), Chen et al.
patent: 5649176 (1997-07-01), Selvidge et al.
patent: 5659716 (1997-08-01), Selvidge et al.
patent: 5680583 (1997-10-01), Kuijsten
patent: 5802348 (1998-09-01), Stewart et al.
patent: 5838954 (1998-11-01), Trimberger
patent: 5923865 (1999-07-01), Chilton et al.
patent: 6408324 (2002-06-01), Wallace et al.
patent: 6430593 (2002-08-01), Lindsley
“Quickturn's CoBALT Plus Sets New Levels in Emulation Capacity and Co-Simulation Speed” What's New Quick Turn Designs Inc. Nov. 1998. www.quickturn.com.*
“Cycle-based Simulation” Technology, QuickTurn Designs Inc. Nov. 1998. www.quickturn.com/tech/cbs.htm. Feb. 2001.*
“Technology: In Circuit Emulation” Technology QuickTurn Designs Inc. Nov. 1998. www.quickturn.com/tech/emulation.htm Feb. 2001.*
“CoBALT Plus Brochure” Products QuickTurn Designs Inc. www.quickturn.com/products/products/cobaltplus-brochure.htm Feb. 2001.*
“CoBALT Plus” Technical Data Sheet, Products, QuickTurn Designs Inc. Nov. 1998. www.quickturn.com/products/coblatplus_data_sheet_.htm Feb. 2001.*
Micropax™ Connector System, FCI, www.fciconnect.com Framatome Connectors International. S.A. (2000).*
“Cycle-Based Simulation”,Technology,Quickturn Design Systems, Inc., www.quickturn.com/tech/cbs.htm, downloaded (Feb. 13, 2001).
“Technology: In Circuit Emulation”,Technology,Quickturn Design Systems, Inc., www.quickturn.com/tech/emulation.htm, downloaded (Feb. 13, 2001).
“CoBALTPlusBrochure”,Products,Quickturn Design Systems, Inc., www.quickturn.com/products/cobaltplus-brochure.htm, downloaded (Feb. 13, 2001).
“CoBALTPlusTechnical Data Sheet”,Products,Quickturn Design Systems Inc., www.quickturn.com/products/coblatplus_data_sheet.htm, downloaded (Feb. 13, 2001).
“Micropax™ Connector System”,, FCI, www.fciconnect.com, Framatome Connectors International, S.A., (2000).
Gooding Thomas Michael
Musselman Roy Glenn
Newshutz Robert N
Ruedinger Jeffrey Joseph
International Business Machines - Corporation
Stevens Thomas H.
Teska Kevin J.
Wood Herron & Evans LLP
LandOfFree
Time-multiplexing data between asynchronous clock domains... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Time-multiplexing data between asynchronous clock domains..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Time-multiplexing data between asynchronous clock domains... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3387028