Time multiplexing address and data on an existing PC parallel po

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395871, 39542101, G06F 300

Patent

active

056945574

ABSTRACT:
A method of communicating with peripheral devices via a personal computer parallel port having computer data bus lines but no address bus lines comprising connecting the input of a multiplexer to the parallel port, the multiplexer having a data bus input and a databus output and an address bus output, applying address data to the computer data bus, applying an address control signal to the multiplexer and passing the address data only to the address bus output as a result thereof.

REFERENCES:
patent: 4349870 (1982-09-01), Shaw et al.
patent: 5191656 (1993-03-01), Forde, III et al.
patent: 5276443 (1994-01-01), Gates et al.
patent: 5359717 (1994-10-01), Bawles et al.
patent: 5457785 (1995-10-01), Kikinis et al.

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