Time multiplexed bus matrix switching system

Details Time multiplexed bus matrix switching system Time multiplexed bus matrix switching system

1985-09-13

1988-02-16

Weldon, Ulysses

Communications: electrical

Continuously variable indicating

With meter reading

307465, H04Q 100

Patent

active

047258357

ABSTRACT:
Ports including at least input and output signal lines are collected into port groups. For each port group three separate clock synchronized time division switches are connected respectively to the input signal lines, bus highways and the output signal lines. All time division switches of the system are synchronized by a system clock and each one is controlled by its own storage of selected addresses in time slot order. A plurality of bus highways is provided and the input time division switch connects signals to a specific bus highway of the system. A second time division switch selects the bus highway for connection to the output section of the port group. A third time division switch selects the output port to which the selected bus highway is connected. In one embodiment the bus highways directly connect the port groups. In another, a central inter-connect matrix is provided to make the connection between the first and second time division switches.

REFERENCES:
patent: 3711650 (1973-01-01), Kuhn et al.
patent: 3811014 (1974-05-01), Seitz
patent: 3971891 (1976-07-01), Wolcott
patent: 4048672 (1977-09-01), Seiden et al.
patent: 4393381 (1983-07-01), Seiden
patent: 4394541 (1983-07-01), Seiden
patent: 4477898 (1984-10-01), Cholat-Namy

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