Time interleaved common mode feedback circuit with process...

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

Reexamination Certificate

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Details

C327S091000

Reexamination Certificate

active

06191622

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to differential amplifiers and bias circuits often used in conjunction with differential amplifiers. In particular, the present invention relates to providing a low-noise common mode feedback signal for adjusting common mode output voltage of a differential amplifier, and a bias current source which is immune to process variations.
2. Discussion of the Related Art
Differential amplifiers are building blocks of many analog circuits, especially analog amplifiers circuits in which high gain and high signal fidelity are required. An example of such an analog amplifier circuit can be a digital-to-analog conversion circuit suitable for use in computer graphics applications. To achieve the goals of high gain and high signal fidelity, differential amplifiers are required to have high common mode rejection, so as to provide the requisite dynamic output range.
Bias circuits are often used in conjunction with many applications of a differential amplifier. In an analog integrated circuit, for example, a bias circuit is often used to generate a reference current, which is then mirrored throughout the integrated circuit as a reference bias current wherever such a current is needed. However, variations in the manufacturing process of transistor current mirrors can result in significant variations in the mirrored current. For example, a 10% variation in the channel length of an MOS transistor in a current mirror can result in a more than 10% variation in the mirrored current.
Current sources are also extensively used with differential amplifiers. For example, a current source is frequently found in an input stage of a differential amplifier. Such a current source preferably has high noise-immunity and a high output impedance.
SUMMARY OF THE INVENTION
According to one aspect of the present invention, a feedback circuit in a differential amplifier provides a common mode feedback signal based on the common mode component of a differential output signal of the differential amplifier. The common mode output circuit includes (a) a first generator circuit providing, during an active phase of the first clock signal, a voltage approximating a common mode component of the differential signal plus a bias voltage; and (b) a second generator circuit also providing the voltage approximating the common mode component of the differential signal plus the bias voltage, but during an active phase of the a second clock signal, which is active when the first clock signal is inactive.
In one embodiment, the common mode feedback circuit includes, in each generator circuit, one or more capacitors which are charged during an inactive phase of the clock signal associated with the generator circuit. The charge in the capacitors provides the requisite bias voltage in the common mode feedback signal. A control circuit multiplexes each generator circuit between providing the common mode feedback signal and charging the capacitors to provide the bias voltage. The control circuit includes a number of transistor switches each controlled by an appropriate clock signal.
In one embodiment, in each generator circuit, the capacitors are configured such that, during the inactive phase of the clock signal associated with the generator circuit, the capacitors are coupled in parallel for charging by a current source and, during the active phase of the clock signal, the capacitors are coupled in series. In that series configuration, the differential signal is coupled across the series capacitors and a common terminal of the capacitor provides the common mode feedback signal.
According to another aspect of the present invention, a current source compensated for process variation includes (a) a first transistor of a first channel length receiving a reference voltage at a control terminal and generating a first current at an output terminal, and (b) a second transistor of a second channel length much longer than the channel length of the first transistor, receiving at its control terminal the reference voltage and generating at its output terminal a second current. The first and second currents are combined to provide the output current of compensated current source. Because of its much longer channel length, the second transistor is much less sensitive to channel length variations resulting from process variations. Thus, the second transistor can provide a compensating current that is insensitive to the process variations affecting the first transistor, while the first transistor can provide the high current output required. In some applications, especially in differential amplifiers, the bandwidth of a differential amplifier can be significantly enhanced by a bias current from a compensated current source of the present invention.
The present invention is better understood upon consideration of the detailed description below, in conjunction with the accompanying drawings.


REFERENCES:
patent: 5894284 (1999-07-01), Garrity et al.
patent: 5923206 (1999-07-01), Levinson
patent: 5973540 (1999-07-01), Boisvert

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