Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Timing
Reexamination Certificate
2006-08-01
2006-08-01
Phan, Thai (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Simulating electronic device or electrical system
Timing
C709S226000, C370S230000, C370S395400, C700S099000, C718S105000
Reexamination Certificate
active
07085704
ABSTRACT:
Methods and apparatus for hardware scheduling processes handling are presented. The apparatus includes a table of task lists. Each task list has specifications of processes requiring handling during a corresponding time interval. Each task list is parsed by a scheduler during a corresponding interval and the processes specified therein are handled. The methods of process handling may include a determination of a next time interval in which the process requires handling and inserting of process specifications in task lists corresponding to the determined next handling times. Implementations are also presented in which task lists specify work units requiring handling during corresponding time intervals. The entire processing power of the scheduler is used to schedule processes for handling. Advantages are derived from an efficient use of the processing power of the scheduler as the number of processes is increased.
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Barrack Craig
Yik James
Phan Thai
Rothwell, Figg Ernst & Manbeck, PC
Zarlink Semicorporation V.N. Inc.
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