Time error compensation arrangement and multi-carrier modem...

Pulse or digital communications – Equalizers – Automatic

Reexamination Certificate

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C375S219000, C375S225000, C375S226000, C375S233000, C375S234000, C375S295000, C375S325000, C375S356000, C375S373000

Reexamination Certificate

active

06553066

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a time error compensation arrangement for compensating, in a multi-carrier receiver, a time error between a receiver sample clock of the muti-carrier receiver and a transmitter sample clock in a transmitter communicating with the receiver, and further relates to a multi-carrier receiver having such a time error compensation arrangement.
Such a time error compensation arrangement and a multi-carrier receiver including such a time error compensation arrangement are already known in the art, e.g. from the United States patent U.S. Pat. No. 5,228,062, entitled ‘Method and Apparatus for Correcting for Clock and Carrier Frequency Offset, and Phase Jitter in Multicarrier Modems’. More particularly, FIG. 2 of U.S. Pat. No. 5,228,062 shows a multi-carrier modem including circuitry to detect a time error resulting from a frequency difference between a transmitter clock and receiver clock, phase jitter impairments, etc., and including a digital filter—named interpolator and referred to by
310
in FIG. 2 of U.S. Pat. No. 5,228,062—to compensate for the detected time error. Although the circuitry to detect the time error and the operation thereof during a training mode and data mode is described in detail, the digital filter that compensates for the detected time error is not described in detail in the above mentioned U.S. Patent. Nevertheless, the complexity of this digital filter in terms of amount of filter coefficients and mathematical complexity of the algorithm that updates the filter coefficients is high, as will be appreciated by any skilled person. In the paragraph from line
23
to line
34
of column
8
of the cited U.S. Patent, it is even indicated that the digital filter is not essential because it may be replaced by a voltage controlled oscillator, which is a very expensive component and whose use would not be considered if the digital filter would be simple to realise.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a time error compensation arrangement, and related multi-carrier receiver and time error compensating method of the above known type, but whose complexity in terms of amount of filter coefficients required to compensate for a given time error with a given accuracy, and the mathematical complexity of an algorithm for updating the filter coefficients, is reduced significantly.
According to the invention, this object is achieved by the time error compensation arrangement defined in claim
1
and the multi-carrier receiver defined in claim
5
.
Indeed, whereas the known digital filter has to compensate for the complete time error, the digital time correction filter in the arrangement according to the present invention only compensates for the linearly incrementing contribution in the detected time error that results from the time frequency difference between the transmitter clock and frequency clock. Such a linearly increasing time error can be compensated for by a digital filter, operative in time domain, with low complexity. The filter coefficients thereto may be adjusted continuously in accordance with a filter coefficient updating algorithm. Such algorithms are well known in the art. The remaining contribution to the time error, which is an integer times (N−1).&Dgr;k in case the linearly incrementing contribution to be compensated for by the digital filter is limited to (N−1).&Dgr;k−N being the amount of samples in a multi-carrier symbol and &Dgr;k being the linear increment of the time error—is compensated for in frequency domain by a rotor such as the one known from European Patent Application EP 0 820 171, entitled ‘Multicarrier transmitter or receiver with phase rotators’. Summarising, according to the present invention, combined time domain and frequency domain compensation for the time error between the clocks of a multi-carrier transmitter and multi-carrier receiver leads to a simplification of the required hardware and software used to implement the time error compensation arrangement.
It is to be noticed that the term ‘comprising’, used in the claims, should not be interpreted as being limitative to the means listed thereafter. Thus, the scope of the expression ‘a device comprising means A and B’ should not be limited to devices consisting only of components A and B. It means that with respect to the present invention, the only relevant components of the device are A and B.
Similarly, it is to be noticed that the term ‘coupled’, also used in the claims, should not be interpreted as being limitative to direct connections only. Thus, the scope of the expression ‘a device A coupled to a device B’ should not be limited to devices or systems wherein an output of device A is directly connected to an input of device B. It means that there exists a path between an output of A and an input of B which may be a path including other devices or means.
An additional feature of the time error compensation arrangement according to the present invention is defined in claim
2
.
Indeed, as will be explained later, an embodiment of the digital time correction filter with a Farrow architecture can be realised. In such an embodiment of the present invention, the digital time correction filter comprises a parallel structure of digital filters having constant filter coefficients. The outputs of these parallel digital filters are scaled with scale factors that are time variable so that changes in clock speed difference between the transmitter clock and receiver clock can be countered by suitably adapting the scale factors. The scale factors, as will be shown later in this application, have a simple relation to the time error between transmitter and receiver so that no complex algorithm is required for updating the scale factors and no updating algorithm at all is required for the filter coefficients which are constant now.
Furthermore, an advantageous implementation of the embodiment of the present invention with time invariable filter coefficients is defined by claim
3
.
Indeed, lab tests have shown that in an ADSL (Asymmetric Digital Subscriber Line) or VDSL (Very High Speed Digital Subscriber Line) environment, a time error between the multi-carrier DMT (Discrete Multi Tone) modem at the central office and the multi-carrier DMT (Discrete Multi Tone) modem at the remote client can be compensated for by a arrangement according to the present invention with time invariable filter coefficients and reduced architectural complexity. A Farrow architecture with six filter coefficients and 1 adaptable scale factor is sufficient for time error compensation in such an environment, as will be proven later in this document.
Also an advantageous feature of the present invention is defined by claim
4
.
In this way, by increasing the time error contribution compensated for by rotor with
N
.
Δ



k
2
,
the magnitude of the time error contribution to be compensated for by the digital time correction filter is minimised. Indeed, as will shown later, the linearly increasing time error contribution to be compensated for by the digital time, correction filter, would normally increase from zero to (N−1. &Dgr;k, whereas it now increases from
-
N
.
Δ



k
2



to



(
N
2
-
1
)
·
Δ



k
.
Furthermore, an advantageous additional feature of the multi-carrier receiver according to the present invention is defined by claim
6
.
In this way, by upsampling the transferred multi-carrier signal before it is digitally filtered in the time error compensation arrangement and by downsampling the multi-carrier signal after it has been digitally filtered in the time error compensation arrangement, amplitude distortion of the multi-carrier signal due to the digital filtering is reduced.


REFERENCES:
patent: 5228062 (1993-07-01), Bingham
patent: 6181755 (2001-01-01), Junell
patent: 0 820 171 (1998-01-01), None
patent: WO 96/25803 (1996-08-01), None
Vesma, Jussi; Renfors, Markku; Rinne, Jukka: “Comparis

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