Time domain reflectometry based transmitter equalization

Details Time domain reflectometry based transmitter equalization Time domain reflectometry based transmitter equalization

2002-12-20

2004-10-05

Deb, Anjan (Department: 2858)

Electricity: measuring and testing

Impedance, admittance or other quantities representative of...

Distributive type parameters

C324S647000

Reexamination Certificate

active

06801043

ABSTRACT:

BACKGROUND
A transmitter can transmit information to a receiver via an interconnect (e.g., a wire or a printed circuit board trace). By way of example, an Application Specific Integrated Circuit (ASIC) device may transmit a stream of one-bit symbols (each symbol being represented by a low voltage indicating a “0” or a high voltage indicating a “1”) to another ASIC device via a serial point-to-point interconnect.
Depending on the characteristics of the interconnect, however, a symbol could be misinterpreted by the receiver because of lingering effects associated with symbols that were previously transmitted via the interconnect. For example, a significant amount of voltage might remain on the interconnect after a long series of 1s are transmitted. As a result, a receiver to mistakenly interpret a newly transmitted 0 as a 1. Such problems, referred to as Inter-Symbol Interference (ISI), can limit that rate at which information can be accurately transmitted via the interconnect.
The amount of ISI associated with an interconnect may be due to interconnect frequency dependent insertion loss characteristics (which can be especially poor with respect to printed circuit board technology). Moreover, the ISI problem may worsen as data transfer application speeds increase.
To reduce ISI, it is known that a passive equalization network can be designed and connected to an interconnect. Such an approach, however, may introduce additional insertion loss in the link. Moreover, the network topology, and the values of associated components, is highly dependent on the insertion loss characteristics of the particular interconnect (which might not be known at the time the passive equalization network is designed).
Similarly, it is known that active equalization may be implemented at a transmitter (e.g., pre-emphasis) or receiver to reduce ISI. For example, an adaptive-tapped-delay-line filter may be designed to cancel out frequency dependent loss characteristics of an interconnect. In this case, however, the appropriate filter coefficients will depend on the particular interconnection media and topology (which might not be known at the time the filter is designed).


REFERENCES:
patent: 3617877 (1971-11-01), Hobson
patent: 6323654 (2001-11-01), Needle et al.
patent: 6534996 (2003-03-01), Amrany et al.
patent: 6566889 (2003-05-01), Warke
patent: 6675328 (2004-01-01), Krishnamachari et al.
patent: 2002/0089335 (2002-07-01), Williams
patent: 2003/0231023 (2003-12-01), Belge et al.

Affiliated with

Also associated with

Rating

Time domain reflectometry based transmitter equalization does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Time domain reflectometry based transmitter equalization, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Time domain reflectometry based transmitter equalization will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3276288