Time-domain boundary bridge method and apparatus

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Pulse multiplication or division

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36518912, 395164, 327113, H03K 2100

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active

054188253

ABSTRACT:
A method and apparatus for a time domain boundary bridge circuit for capturing an event on an asynchronous input is described, comprising an S-R latch coupled to an asynchronous input, a first D flip-flop coupled to a synchronous clock and the output of the S-R latch, and a second D type flip-flop coupled to a synchronous clock and the output of the first D flip-flop, and having an output coupled to a circuit output terminal, operable to provide a synchronous output which reflects an event occurrence on the asynchronous input. A second embodiment is disclosed for use in systems where the asynchronous input signal is accompanied by a clock or strobe signal comprising a first D type flip-flop clocked on the strobe signal coupled to the asynchronous input signal, a second D type flip-flop clocked on a synchronous clock and coupled to the output of the first D type flip-flop, a third D type flip-flop coupled to the output of the second D type flip-flop and driving a circuit output terminal, and self clearing logic which clears the first D type flip-flop when the event is synchronously transmitted on the circuit output. A third embodiment is disclosed wherein the second embodiment additionally comprises rapid self-clearing logic improving the throughput rate possible on the asynchronous input signal. Other embodiments are also disclosed.

REFERENCES:
patent: 4851710 (1989-07-01), Grivna
patent: 4873703 (1989-10-01), Crandall et al.
patent: 5099141 (1992-03-01), Utsunomiya
patent: 5125089 (1992-06-01), McCambridge
patent: 5146584 (1992-09-01), Christensen

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