Time division switching system

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370 68, H04Q 1104

Patent

active

047590122

DESCRIPTION:

BRIEF SUMMARY
FIELD OF THE INVENTION

This invention relates to a time division switching system which is capable of reallocation of channels, and more particularly to a time division switching system of which hardware is compact in size and which can reduce delay within the switching system. This system is suitable to be carried on a satellite.


BACKGROUND OF THE INVENTION

An example of a prior art time division switching system is described referring to FIGS. 4 through 6. FIG. 4 is an explanatory view of a system for carrying a time division switching system on a satellite. The blocks (of a plural number) 1,2,3 at the bottom of the figure represent ground stations installed on the earth, and a block 30 at the top of the figure represents a facility installed on a satellite. When a ground station 1.sub.1 wishes to call another ground station 1.sub.2 through a communication channel, switching is controlled as in the following process. A call originating signal from the ground station 1.sub.1 is transmitted to a channel allocation control station 2 and a switching control station 3 via a terrestrial common channel signal network. The channel allocation control station 2 hunts for idle channels in the uplink U between the ground station 1.sub.1 and the satellite 30 and the downlink D between the ground station 1.sub.2 and the satellite 30 as soon as it receives the call originating signal, and it sends the data to the ground stations 1.sub.1 and 1.sub.2 via terrestrial common channel signal network 25 and to the satellite 30 via a satellite channel. The switching control station 3 sends to a switching control circuit 8 the time switching control data for alternately connecting the channels hunted for in the uplink U and the downlink D. Consequently, a time switch 6 connects the channels between the uplink U and the downlink D. The ground station 1.sub.1 transmits data to the satellite 30 by using an allocated channel of the uplink U while the ground station 1.sub.2 receives the data via an allocated channel of the downlink D.
FIG. 5 shows a frame structure of the uplink U. The data transmitted from respective ground stations 1.sub.1 through 1.sub.n are united in a unit of plural channels and added to a preamble P for synchronized control of data at the top thereof to form a traffic burst for each of the ground stations. FIG. 5 shows the states of traffic bursts when they are being transmitted to the uplink U, led by preamble P at the top and provided with a guard time D respectively.
At the time T.sub.1, since the traffic is small, there are idle channels among allocated ones. But at the time T.sub.2, the traffic becomes too large to be processed unless channels are reallocated. For instance, as shown in FIG. 5, the burst from the ground station 1.sub.n-1 is elongated by shortening the burst from the ground station 1.sub.n which has some idle frames. In this manner channels are constantly reallocated in order to maximize the efficiency in processing calls which are constantly originated.
In this prior art system, a time switch is fixedly connected from the time a call is originated to the time it is cleared. More particularly, in FIG. 4 data are controlled by a counter 7 aboard the satellite in a manner so as to be sequentially written in the time switch 6 and read out by the control of the switching controller 8. The data in the switch controller 8 are not changed from the origination of a call until the clearance thereof. In order to reallocate channels in the prior art, it is thus necessary to provide a channel transfer circuit 5 in the preceding satge of the time switch 6 so that the input channel members at the time switch 6 would not be changed even if the channels in the uplink U are reallocated.
FIG. 6 is a structural view of a prior art channel transfer circuit 5. More specifically, two channel transfer memories 15.sub.1, 15.sub.2 are provided for each dataway to store data of one frame, and signals are written in either of the channel transfer memories 15.sub.1, 15.sub.2 in the order of arrival and read out in

REFERENCES:
patent: 3967070 (1976-06-01), Srivastava et al.
patent: 4467471 (1984-08-01), Troost
patent: 4470139 (1984-09-01), Munter
patent: 4471479 (1984-09-01), Waas
patent: 4510597 (1985-04-01), Lewis

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