Time division switching apparatus

Multiplex communications – Wide area network – Packet switching

Patent

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Details

370 68, H04J 302

Patent

active

051230127

ABSTRACT:
A time division switching apparatus for interchanging data between an input highway and an output highway includes a number of buffer memories each receiving the same data from the input highway in parallel, a control memory for controlling the addresses of the buffer memories into which the data is written, and for controlling the addresses of the buffer memories from which data is written, at specific time positions. The apparatus may include demultiplexing/multiplexing circuitry for converting serial data to parallel data for storing in the buffer memories and parallel data from the buffer memories to serial data to be sent to the output highway. Data be interchanged according to specific data bit units or time slot units, wherein each time slot defines a specific number of data bits.

REFERENCES:
patent: 4574375 (1986-03-01), Kemp et al.
patent: 4941141 (1990-07-01), Hayano

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