Amplifiers – Modulator-demodulator-type amplifier
Reexamination Certificate
2001-11-12
2003-04-22
Choe, Henry (Department: 2817)
Amplifiers
Modulator-demodulator-type amplifier
C330S146000, C330S20700P
Reexamination Certificate
active
06552607
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to bridge circuits, and more particularly to bridged output drive circuitry for amplifiers.
BACKGROUND OF THE INVENTION
It is helpful to consider the features of certain analog amplifiers and certain digital amplifiers known in the art in order to understand the advantages of the present invention.
The disadvantages of analog amplifiers are well known and numerous mechanisms have been implemented in the art to overcome their deficiencies. Efforts to overcome the poor efficiency of analog amplifiers, among other things, gave rise to the development of relatively higher efficiency switching amplifiers. However, switching amplifiers have their own deficiencies, including difficulties in processing small signals without undesirable distortion. Binary switching amplifiers, in particular, are known to produce ripple in small output signals when a modulation carrier frequency is removed from the amplified signal.
Mechanisms to improve the performance of binary switching amplifiers have involved implementing more output switching states. The conventional two output states of binary switching amplifiers have been supplemented, and performance has been improved by known switching amplifiers implementing third (“ternary”) and fourth (“quaternary”) output switching states. For instance, U.S. Pat. No. 5,077,539 (“the '539 patent”) issued Dec. 31, 1991, owned by the present assignee and incorporated herein by reference, describes ternary and quaternary modes of switching operation implemented in an amplifier design to overcome distortion affecting small signal inputs to the switching amplifier.
Ternary or tri-state mode waveforms represent input signal amplitude information as the timed width and polarity pulses, comprising discrete amplitudes of zero, positive or negative polarity. With ternary techniques, signal information is directly converted to appropriately wide pulses of positive or negative polarity.
The ternary implementation as disclosed in the referenced patent, however, contains an error source which limits its use in audio or servo motor amplifier applications. This error source produces output signal distortion because of non-linearity in the output transfer function for small input signals, specifically as the input signal transitions through zero. For small input signals, performance degradation results because of the finite rise and fall times of the output signals produced by the power switching circuit. These switch times represent a fixed magnitude error, subtracted from a diminishing magnitude signal, which produces a non-linear gain characteristic and signal distortion.
In order to overcome the non-linear behavior of the tri-state embodiment, it is known in the prior art to introduce a fourth state, specifically to linearize the output transition through zero. For small input signals, the four-state or quaternary embodiment, which is described in detail in the referenced patent, employs an analog amplifier to affect a linear transition through zero. This fourth output state employs a linear analog amplifier in conjunction with ternary switching to linearize small signal performance. Below a predetermined signal magnitude, the load is switched to the linear analog amplifier and the ternary power switch is disabled. Above the magnitude threshold, the power switch is enabled and the load is disconnected from the linear amplifier. This compromise solution offers certain advantages, however, like the binary and ternary implementations, it suffers particular disadvantages.
The ternary and quaternary techniques known in the prior art accept an analog input signal, which in those analog implementations require no signal conversion means to interface to a linear analog amplifier. In those implementations, all signal processing uses analog means, i.e. analog circuitry is used to implement signal conversion, pulse width modulation control, and output linearization for small signals. However, these analog implementations are not cost effective because, for example, very large scale integrated circuitry can not be economically used to implement the analog designs. The alternative non-integrated configuration occupies excessive space.
Furthermore, for amplifier input signals that are inherently digital, as from the output of digital audio media, CD-ROM, digital control systems, or the like, the analog prior art requires signal conversion circuitry to interface with the analog switching amplifier implementations(s). Interface circuitry at the front end of the amplifier can degrade performance and further burden system cost.
An all digital switching amplifier that can be implemented on low cost application specific integrated circuits is disclosed in U.S. Pat. No. 5,617,058 to Adrian et al. (“the '058 patent”) also owned by the present assignee and incorporated herein by reference. The all digital switching amplifier of the '058 patent provides linearization of the power switch solely by using three states.
According to the '058 patent, in an all digital implementation, a small fixed width, bi-state compensating pulse wave-form is added to the leading or trailing edges of an oversampled main input pulse producing a compensated waveform. This compensating pulse linearizes output from a power switch by effecting common mode cancellation of switch time errors.
A correction mechanism is implemented to correct for harmonic distortion resulting from the compensation pulse, also referred to as the pulse carrier or carrier, which is dependent on the modulation level or index. Harmonic distortion is corrected by the correction mechanism applying the inverse of the modulation induced distortion to the pre-processing of the input signal amplitude information so as to null distortion products resulting from the modulation scheme used to apply the small carrier to linearize the performance of the tri-state power switch.
The correction mechanism is implemented using digital signal processing (DSP) that facilitates application of the inverse of the modulation induced distortion to the over-sampled input signal. Coefficients required by the correction mechanism to compute the induced distortion correction are derived from a look-up table referenced by the estimated amplitude of the input signal.
In further accord with the '058 patent, digital timing control of the power switch's deadband is effected. Digital deadband control ensures accuracy of the timing and sequence in which individual switches within a power switch H-bridge are turned off and turned on, so as to preclude a situation where both upper and lower switches on one side of the bridge are both turned on at the same time. Accurate digital timing appropriately sequences the break-before-make timing to avoid a short circuit across the power supply. In the all digital design according to the '058 patent, a high speed clock used to generate the pulse width modulated waveforms to linearize the output from the power switch by common mode cancellation of switch time errors, can also be used to provide a timing reference to generate the necessary deadband timing delays required for the power switches, producing a much more stable switching situation.
Additionally, in an all digital audio amplifier embodiment according to the '058 patent, each individual switch's timing can be adjusted appropriately to accomplish a zero-voltage switch transition between the main pulse and the compensating pulse by providing a short period in which non-e of the switches are turned on. A conventional bridge is implemented using enhancement mode MOSFETs so that current will continue to flow through the body source-drain diodes of the alternate two switches to be turned on causing the diodes to become forward biased. When the diodes are forward biased, the voltage across the off switches is substantially zero, permitting a cleaner turn-on. Use of enhancement mode MOSFETs in an H-Bridge switch configuration provides higher efficiency, faster switching speeds, an
Apogee Technology Inc.
Brown Rudnick Berlack & Israels LLP
Choe Henry
Michaelis Brian L.
Quinn Joseph P.
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