Time division multiplexed link connections between a...

Details Time division multiplexed link connections between a... Time division multiplexed link connections between a...

2005-02-22

2009-10-13

Yao, Kwang B (Department: 2416)

Multiplex communications

Pathfinding or routing

Through a circuit switch

C370S395700, C370S429000

Reexamination Certificate

active

07602776

ABSTRACT:
Disclosed is an input port to one or more switching matrices of a network element or the like through a number of backpanel connections, the port receiving input flows in the form of bits arranged in frames, the port comprising: a memory for storing a number of bytes belonging to a tributary; a slicer for slicing the stored bytes in a number of word structures and a backpanel framer for forming backpanel frames with said word structures, the number of said word structures being equal to the number of said switching matrices and the capacity of the input flow being equal to the capacity of the overall backpanel connection capacity.

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