Communications: electrical – Digital comparator systems
Patent
1971-09-20
1976-12-21
Springborn, Harvey E.
Communications: electrical
Digital comparator systems
G06F 300
Patent
active
039991628
ABSTRACT:
Switching circuitry for transferring data from an input time-division multiplex system to an output time-division multiplex system includes a transfer circuit for temporarily storing the data received from the input-time-division multiplex system prior to its transfer to the output time-division multiplex system. For controlling the selective transfer of data from an input channel of the input time-division multiplex system to any one output channel of the output time-division multiplex system control circuitry is provided which controls the storage of the input channel data in a selected position of the transfer circuit with a timing corresponding to the respective time slots of the input channel and controls the transfer of that data from the selected position in the transfer circuit to the output time-division multiplex system with a timing corresponding to the respective time slot selected output channel. Write control circuitry stores in a write control memory the selected position in the transfer circuit in a word of the control memory corresponding to the time slot of the input channel in the input time-division multiplex system so that in response to time slots generated by an input time slot generator, the position address of the word in the control memory can be applied to the transfer circuit to control writing of data from the input channel into the transfer circuit in the position selected. Read control circuitry includes a read control memory wherein the selected position in the transfer circuit is stored in a word of that read control memory corresponding to the time slot of the output channel in the output time-division multiplex system so that data in the selected position of the tranfer circuit can be read out to the output time-division multiplex system at the proper time. The read and write control arrangements can also be constituted by elementary control memories connected to elementary inputs or outputs of the input and output multiplex circuitry.
REFERENCES:
patent: 3300763 (1967-01-01), Hoehmann
patent: 3331055 (1967-07-01), Betz et al.
patent: 3436733 (1969-04-01), Pearce et al.
patent: 3462743 (1969-08-01), Milewski
Compagnie Industrielle des Telecommunications Cit-Alcatel
Societe Lannionnaise d'Electronique Sle-Citerel
Springborn Harvey E.
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