Time-division multiplex communication control circuit for ATM te

Details Time-division multiplex communication control circuit for ATM te Time-division multiplex communication control circuit for ATM te

1996-12-16

1999-02-23

Marcelo, Melvin

Multiplex communications

Data flow congestion prevention or control

Control of data admission to the network

370397, 370399, H04L 1256

Patent

active

058751742

ABSTRACT:
Information generated by a terminal is delivered to an ATM transmission circuit, which assembles a cell from the information and inserts the cell into a transmission cell stream. An unassigned cell and an idle cell that do not contain information to be actually transmitted are removed from the transmission cell stream by an ineffective cell removing circuit. Only a cell which contains information to be actually transmitted is held by a FIFO memory until a transmission time. The reception by an ATM reception circuit of a cell representing a reference time is detected by a received VPI/VCI detecting circuit. The time at which to output the transmission cell from the FIFO memory to a circuit line is determined by a timer with respect to the reference time. In response to the determined time, a transmission control circuit reads the transmission cell from the FIFO memory, and delivers the transmission cell to the circuit line.

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