Time division multiple equipment

Multiplex communications – Pathfinding or routing – Through a circuit switch

Reexamination Certificate

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Details

C370S535000

Reexamination Certificate

active

06192047

ABSTRACT:

BACKGROUND OF THE INVENTION
This invention relates to a time division multiple equipment for multiplexing, in the time division type, digital data from a plurality of a data terminal equipment having various data transmission speeds and effectively transmitting through a high-speed digital line.
FIG. 18
shows one example of the conventional time division multiple equipment. According to the structure of the equipment, various terminal interfaces DATA I/F, a high-speed digital interface SDI I/F, and a controller CONT are connected in a bus system by means of a highway HW.
Low-speed data of the terminal interface DATA I/F is transmitted one bit by one bit to the high-speed digital interface SDI I/F according to instructions of the controller CONT, so that a bit multiplexing process is carried out.
One example of this system is described in Japanese Patent Laid-open 61 (1986)-163741 official gazette. This system has a simple structure, so it has been employed in many time division multiple equipment of relatively small size.
FIG. 19
is a figure obtained from “High Function MTDM System Structure”, page 1435 to 1453 of NTT Study Practicalization Report, Volume 36, No 11 (1987).
This example above has a time division switch TSW exchanging in the time division type at a basic speed of 64 Kbits per 1 sec (hereinafter, it is expressed by Kbps). The time division switch divides the signal speed from the terminal interface DATA I/F into 3.2 Kbps series and 8 Kbps series. A bit multiplexing process of 3.2 Kbps, 8 Kbps, 0.4 Kbps is carried out by means of a time slot exchanger TSI.
Also, the output sides of the time division switch TSW and each time slot exchanger TSI are connected to the input sides of other time slot exchanger TSI or the time division switch TSW. It is called a crossing form of connection, so that the same data traffic passes several times the same time slot exchanger TSI and the time division switch TSW. Consequently, the traffic of the time slot exchanger TSI, in particular the time division switch TSW becomes very large one.
Detail of the equipment of the example is reported in NTT Study Practicalization Report, volume 36, No 11(1987), “High Function MTDM System Structure”.
A time division switch of multi-dimension speed data is disclosed in Japanese Patent Laid-open 61 (1986)-242193 official gazette and Japanese Patent laid-open 62 (1987)-57398 official gazette.
According to the conventional system mentioned above having no time division switch, its structure is simple. However, it is difficult to be corresponded to a change of the line structure due to a traffic change and to enlarge its scale. They are disadvantages.
According to the conventional system having the time division switch, it is necessary to install the time slot exchanger TSI for carrying out the bit-multiplexing process every signal speed series of the data terminal equipment. Therefore, considering the change of the traffic among each signal speeds, it is necessary to prepare a hardware corresponding to the largest traffic of each signal speed, and it is not easy to correspond economically to the change of data traffic.
According to the system, because the same data traffic passes repeatedly through the time division switch TSW and the time slot exchanger TSI, the hardware of the time slot exchanger TSI, in particular the time division switch TSW, becomes disadvantageously large.
The invention has been invented so as to solve such problems of the above-mentioned conventional system. The purpose of this invention is to provide an economic time division multiple equipment for carrying out unificationally the bit-multiplexing process without any relation to a signal speed of the data terminal equipment. Further, the purpose is to provide the time division switch having a structure preventing the same data traffic from passing repeatedly through the time division switch, and the time division multiple equipment having both expandability and flexibility to the change of the data traffic among these signal speeds.
SUMMARY OF THE INVENTION
This invention solves the problem described above. This invention has a terminal interface, a multiple portion and a transmission route interface. The terminal interface carries a low-speed data from a data terminal equipment upon a multi-frame. This multi-frame has a period of one per an integral number in a frame period of a digital channel set previously at the basic speed. The multiple portion multiplexes a signal bit with a bit unit by picking up only the signal bit of the data signal from the data terminal equipment in a plurality of multi-frame and by mapping the signal bit according to the content stored in a mapping-table. On the multi-frame, the data signal from a plurality of the data terminal equipment is carried from the data terminal equipment. The transmission route interface matches a bit array, multiplexed by the multiple portion, with a transmission speed of the high-speed digital line and transmits the bit array to the high-speed digital line.
According to the invention, the low-speed data signal from a plurality of the data terminal equipment is multiplexed unificationally with a bit unit without any relation of the data transmission speed. Therefore, it becomes possible to carry the data signal from the plurality of the data terminal equipment on the digital channel of the basic speed by means of the same equipment. Consequently, this can improve the efficiency of using the high-speed digital line.
Another aspect of the invention is characterized with the time division multiplex equipment having a terminal interface, a time division switch, a multiple portion and a transmission route interface, wherein the time division switch is provided between the terminal interface and the multiple portion. The terminal interface carries a low-speed data from a data terminal equipment upon a multi-frame. This multi-frame has a period of one per an integral number in a frame period of a digital channel set previously at the basic speed. The time division switch carries out the time division exchanging process at the basic speed. The multiple portion multiplexes a signal bit with a bit unit by picking up only the signal bit of the data signal from the data terminal equipment in a plurality of multi-frame and by mapping the signal bit according to the content stored in a mapping-table. On the multi-frame, the data signal from a plurality of the data terminal equipment is carried from the data terminal equipment. The transmission route interface matches a bit array, multiplexed by the multiple portion, with a transmission speed of the high-speed digital line and transmits the bit array to the high-speed digital line.
According to the invention, the low-speed data signal from the plurality of the data terminal equipment is multiplexed unificationally with a bit unit without any relation of the data transmission speed. Therefore, it becomes possible to carry the data signal from the plurality of the data terminal equipment on the digital channel of the basic speed by means of the same equipment. Consequently, this can improve the efficiency of using the high-speed digital line. Further, the changing of the connection of the time division switch can change the circuit structure on demand.
The invention relates to is the time division multiple equipment, in another aspect of the invention, in which the number of bits with reference to a virtual table mapped by the mapping-table carrying out the bit multiplexing process is equal to a figure obtained by multiplying a bit capacity per one time slot in the one multi-frame by the number of the time slot.
According to this aspect of the invention, because the bit capacity to be mapped and the number of bits with reference to the mapping-table mapped are equal to each other, the mapping operation is made easy.
The invention relates to time division multiple equipment, in yet another aspect of the invention, in which the number of bits with reference to a virtual table to be mapped by the mapping-table carrying out the multip

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