Time division multiple access system radio equipment and...

Multiplex communications – Communication over free space – Combining or distributing information via time channels

Reexamination Certificate

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Details

C370S252000, C370S337000, C370S342000, C455S103000, C455S127500, C455S450000

Reexamination Certificate

active

06335925

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a time division multiple access (hereinafter referring to TDMA) system radio equipment and synthesizer output level adjusting circuit. More to particularly this invention relates a TDMA system radio equipment and a synthesizer output level adjusting circuit which is capable of implementing unwanted frequency emission and unwanted wave suppression at the time when a synthesizer is switched.
DESCRIPTION OF THE PRIOR ART
In a circuit constitution of a conventional radio equipment, an output section of a synthesizer of the radio equipment has a switch circuit which performs output control.
As a conventional radio equipment, for example, the Japanese Patent Application Laid-Open No. HEI 07-066737 discloses a radio equipment. The radio equipment comprises a counting means for counting required time period from the time when switching of output frequency of synthesizer starts to the time when the output frequency of the synthesizer converges on specified frequency fluctuation tolerance, an AND circuit for ANDing an output signal of the counting means and a lock signal outputted from the synthesizer, and a means for controlling make-and-break of the switching circuit using output signal of the AND circuit, wherein it causes unwanted transmission to prevent at the leading time of transmission in an output stage of the synthesizer.
However, in the prior art, the synthesizer outputs an output signal although frequency fluctuation is large at the time of channel switching, so that unwanted frequency is inputted into a modulator. As a result, there is a first problem that adjacent-channel leakage power of transmission output for the TDMA system radio equipment becomes high.
Further, in the prior art, an output of the synthesizer with higher neighborhood noise caused by unwanted frequency component which is generated at the time of channel switching of the synthesizer is inputted directly to the modulator, thereby, there is a second problem that neighborhood noise of transmission output frequency of the TDMA system radio equipment is enlarged.
SUMMARY OF THE INVENTION
In view of the foregoing, it is an object of the present invention for resolving the above-mentioned problems to provide a TDMA system radio equipment and a synthesizer output level adjusting circuit which relates to synthesizer switching circuit of the TDMA system radio equipment causing output level to lower when frequency fluctuation is large at the time to switch the synthesizer, and causing unwanted frequency component to suppress.
According to one aspect of the present invention, for achieving the above-mentioned object, there is provided a synthesizer switching circuit which has a voltage variable attenuator for changing attenuation amount according to an applied voltage causing output level to switch OFF-state at the time to switch synthesizer, and which causes attenuation amount of the voltage variable attenuator to rise or to gravitate with required time and required inclination so as not to come into steep leading/trailing of output level of the synthesizer.
Preferably, there is provided a time division multiple access (TDMA) system radio equipment which uses a synthesizer outputting a plurality of frequencies while switching the synthesizer and which comprises a voltage variable attenuator for changing attenuation amount of a synthesizer output in answer to controlled voltage, a counting means for counting such that the attenuation amount of the voltage variable attenuator changes with required time and required inclination based on leading timing at the time of transmission, and a voltage generating means for generating voltage by which attenuation amount of the voltage variable attenuator is changed based on counting of the counting means, wherein it controls such that output level of the synthesizer rises with required inclination before timing of rising at the time transmission, while output level of the synthesizer gravitates with required inclination after timing of gravitating at the time transmission.
Preferably, there is provided a synthesizer output level adjusting circuit being in use for a synthesizer outputting a plurality of frequencies which synthesizer output level adjusting circuit comprises a voltage variable attenuator which is connected to the synthesizer to receive the plurality of frequencies and whose attenuation amount changes caused by controlled voltage, and a counting means for counting such that the attenuation amount of the voltage variable attenuator changes with required time and required inclination based on leading timing at the time of frequency switching of the synthesizer, wherein it causes the controlled voltage to supply to the voltage variable attenuator based on counting of the counting means, and wherein it causes the controlled voltage to control such that output level of the synthesizer rises with required inclination before leading timing at the time of transmission, while output level of the synthesizer gravitates with required inclination after trailing timing after terminating output of the synthesizer.
As stated above, the synthesizer switching circuit according to the present invention, when frequency fluctuation at the time synthesizer switching is of large value, it causes output level of the synthesizer to lower, further there is no steep leading edge and trailing edge of the output level of the synthesizer thereby it is capable of suppressing unwanted frequency component. For this reason, it is capable of preventing deterioration of transmission output adjacency channel leakage power and suppressing adjacent noise of transmission output.
The above and further objects and novel features of the invention will be more fully understood from the following detailed description when the same is read in connection with the accompanying drawings. It should be expressly understood, however, that the drawings are for purpose of illustration only and are not intended as a definition of the limits of the invention.


REFERENCES:
patent: 4105948 (1978-08-01), Wolkstein
patent: 4272729 (1981-06-01), Riley, Jr.
patent: 4602225 (1986-07-01), Miller et al.
patent: 4968950 (1990-11-01), Babin et al.
patent: 5095542 (1992-03-01), Suematsu et al.
patent: 5175511 (1992-12-01), Fujiwara
patent: 5207491 (1993-05-01), Rottinghaus
patent: 5424688 (1995-06-01), Phillips
patent: 5546380 (1996-08-01), Tomasi et al.
patent: 5809420 (1998-09-01), Ichiyanagi et al.
patent: 0 688 108 (1995-12-01), None
patent: WO 97/05697 (1997-02-01), None

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