Time difference adjustment circuit

Details Time difference adjustment circuit Time difference adjustment circuit

2007-11-06

2007-11-06

Cox, Cassandra (Department: 2816)

Pulse or digital communications

Synchronizers

Feedback, receiver to transmitter

C327S161000

Reexamination Certificate

active

11384525

ABSTRACT:
In a first stage, each of level detection circuits compares a transmission signal and a first reference voltage Vr1to detect a rising edge, and phase difference detection circuits detect phase differences between the level detection circuits. In a second stage, each of level detection circuits compares the potential of a signal reflected by a receiving end and a second reference voltage Vr2to detect a rising edge, and phase difference detection circuits detect phase differences between the level detection circuits, each set of which corresponds to adjacent two transmission lines. Based on both the phase differences, the time instant of arrival of signals is adjusted.

REFERENCES:
patent: 6059730 (2000-05-01), Miwa et al.
patent: 6469550 (2002-10-01), Kurd
patent: 6714483 (2004-03-01), Minami et al.
patent: 6847692 (2005-01-01), Tokuhiro
patent: 6865222 (2005-03-01), Payne
patent: 2003/0043926 (2003-03-01), Terashima et al.
patent: 2003/0081709 (2003-05-01), Ngo et al.
patent: 2003/0084365 (2003-05-01), Kubo
patent: 11-225173 (1999-08-01), None

Affiliated with

Also associated with

Rating

Time difference adjustment circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Time difference adjustment circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Time difference adjustment circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3807719